Nozad Karim presently is the Vice President of SiP & System Integration at Amkor Technology. He has over 20 years’ experience with SiP & module technology developments, and over 30 years of experience working with semiconductor packaging, circuit and system designs for digital, analog, and RF/Microwave applications. Prior to Amkor, he served in engineering and management roles with Motorola Communication, Texas Instruments, & Compaq Computer.
With over 25+ years experience in electronics process engineering, material science and technology strategic planning, David is leading innovative assembly technology development for high volume manufacturing operation of consumer electronics, including smartphones, smartwatches, SiP modules, automotive modules, tablets, PC, etc. David has spent many years on Design for Manufacturing (DFM), developed DFX design guidelines, wrote assembly process specifications & standards, established NPI (New Product Introduction) verification facilities and audited EMS outsourcing. Prior to Huawei, David also held a several senior and principal technical positions in Nokia Mobile Phones, Nortel Networks and Alcatel. David is also holding several technology patents in US, Europe and China, leading industrial consortium and external technology collaboration and actively providing keynote presentations and speeches in conferences, seminar and training courses with international background and East-meets-West culture & multi-language capabilities.
Rozalia leads strategic marketing activities across Electronics & Imaging Division of DuPont. She has 28 years of international working experience across various industries, including industrial, electronics and semiconductors. For 19 years she was involved in the research, applications and strategic marketing of Advanced Packaging technologies, with global leading responsibilities at specialty chemicals (Rohm and Haas Electronic Materials), equipment (Semitool, Applied Materials and Lam Research) and device manufacturing (Maxim IC). Prior to joining Dow, Rozalia was the CTO of Yole Développement where she led the market research, technology and strategy consulting activities for Advanced Packaging and Semiconductor Manufacturing. Throughout her career, Rozalia has been actively supporting industry activities worldwide: Program Director of EMC3D Consortia, General Chair of IMAPS Device Packaging and Global Semiconductor and Electronics Forums, Technical Advisory Board Member at SRC, Member of the Executive Committee of ECTC, IMAPS SiP, ISQED, ESTC and member of several committees worldwide (ITRS, IWLPC, EPTC and EPS). Current industry involvements include: IMAPS VP of Technology, Technical Chair IMAPS Advanced SiP, Executive Committee Member of SiP China, ECTC Assistant Program Chair, HIR WLP Chair, Advisory Board Member of 3DinCites and IMPACT Taiwan. She has over 150 presentations and publications (including 3 book chapters on 3D IC technologies), several keynotes, invited presentations and panel participations. Rozalia has a M.Sc. in Chemical Engineering from Polytechnic University "Traian Vuia" (Romania), a M.Sc. in Management of Technology from KW University (USA), and a Global Executive MBA from Instituto de Empresa Business School (Spain).
Rahul Manepalli is a Sr. Principal Engineer and the Director of Module Engineering in Substrate and Package Technology Development Group in Intel Corporation. Rahul manages the Module Engineering group responsible for development of next generation Substrate and Package Technologies for all of Intel’s packaging needs. He has over 20 years of experience in Packaging (Assembly & Substrate materials, processes and modules) and has lead the startup and development of multiple Intel factories and Technology Development teams. He holds over 40 + worldwide patents in the area of electronic packaging and has a Ph.D. in Chemical Engineering from the Georgia Institute of Technology.
Feng Ling is currently Founder and CEO of Xpeedic Technology, a leading EDA solution provider for chip-package-system designs. Dr. Ling has twenty years’ experience in EDA, RF front end and system-in-package designs. His industrial career spans from corporate like Bell Labs and Motorola to EDA startup Neolinear (acquired by Cadence) and Physware (acquired by Mentor Graphics). In 2010, he founded Xpeedic Technology, continuing the efforts to bring the novel EDA solutions to the semiconductor industry. Dr. Ling received his Ph.D. degree in electrical engineering from the University of Illinois at Urbana-Champaign (UIUC) in 2000. He is a Senior Member of IEEE. He has authored and co-authored 2 book chapters and more than 60 papers in refereed journals and conference proceedings. He has 5 US patents. He was the inaugural recipient of the Y. T. Lo Outstanding Research Award from the Department of Electrical and Computer Engineering at UIUC in 1999. He has been an Affiliate Associate Professor in the Department of Electrical Engineering at the University of Washington, Seattle, WA from 2007 to 2011.
Jingkun Mao received his B.S. and M.S. degrees in Electrical Engineering from Tsinghua University, Beijing, China, in 1998 and 2000, respectively. He received his Ph.D. degree in Electrical Engineering from the University of Missouri-Rolla in 2004. From 2004 to 2009, he worked for Amkor Technology Inc., Phoenix, AZ, as a RF Packaging Engineer. Then, he joined the Third Research Institute of MPS, as a Director of Engineer. In July 2017, he joined the Thinsy Tech. Co. Ltd, currently serves as the vice general manager. His research interests include signal integrity and EMI designs in high-speed digital systems, dc power-bus modeling, intra-system EMI and RF interference, PCB noise reduction,differential signaling, and package designs.
E. Jan Vardaman is president and founder of TechSearch International, Inc., which has provided market research and technology trend analysis in semiconductor packaging since 1987. She is the author of numerous publications on emerging trends in semiconductor packaging and assembly. She is a senior member of IEEE EPS and is an IEEE EPS Distinguished Lecturer. She is a member of SEMI and IMAPS. She received the IMAPS GBC Partnership award in 2012 and the Daniel C. Hughes, Jr. Memorial Award in 2018. She is an IMAPS Fellow. Before founding TechSearch International, she served on the corporate staff of Microelectronics and Computer Technology Corporation (MCC), the electronics industry’s first pre-competitive research consortium.
Romain Fraux is the CEO of System Plus Consulting (part of Yole Group of companies), that focuses on Reverse Costing analysis of electronics, from semiconductor devices to electronic systems. Supporting industrial companies in their development, Romain and his team are offering a complete range of services, costing tools and reports. They deliver in-depth production cost studies and estimate objective selling price of a product, all based on a detailed physical analysis of each component in System Plus Consulting laboratory. Romain has been working for System Plus Consulting for more than 12 years and was previously the company’s CTO. He holds a bachelor’s degree in Electrical Engineering from Heriot-Watt University of Edinburgh, Scotland, a master's degree in Microelectronics from the University of Nantes, France and a Master of Business Administration.
Mitsumasa Koyanagi was born in Hokkaido, Japan on 1947. He received the Ph.D. in electronic engineering from Tohoku University, Sendai, Japan, in 1974. He joined Hitachi Ltd. in 1974 where he worked on research and development of MOS memory and invented a stacked capacitor DRAM memory cell which has been widely used in the DRAM production. In 1985, he joined the Xerox Palo Alto Research Center, California. In 1988 he joined Hiroshima University, Japan, as a professor where he worked on sub-0.1um MOS devices, 3-D integration and optical interconnection etc. Since 1994, he has been a professor in Tohoku University and currently a senior research fellow in New Industry Creation Hatchery Center (NICHe), Tohoku University. His current interests are 3-D integration technology, optical interconnection, nano-CMOS devices, memory devices, AI chip etc. He has published more than 300 technical papers and given more than 100 invited talks. He was awarded IEEE Jun-ichi Nishizawa Medal, IEEE Cledo Brunetti Award, the National Medal with Purple Ribbon in Japan etc. He is an IEEE life fellow.
Ram Trichur is the Global Head of advanced packaging market segment at Henkel. He is responsible for the key strategic and financial objectives for this segment. He has around 20 years of experience in the microelectronics industry covering both the front-end manufacturing and backend assembly processes. He has 3 patents and has published more than 40 publications and articles in leading conferences and industry magazines. He received his master’s degree in Electrical Engineering from University of Cincinnati and completed his executive education in business management from Stanford University’s Graduate School of Business.
Hu is based in Suzhou, China, and has extensive experience in semiconductor packaging. He is a veteran in advanced assembly technology development, process improvement, and assembly materials application. He has served in many roles at top 10 outsourced assembly and test (OSAT) companies, including Process Engineer, Project Engineer, Senior R&D Engineer, and Chief Engineer. Hu earned a master's degree in IC Engineering from Chinese Academy of Sciences, and a bachelor’s degree in electronic information science and technology from Nankai University, Tianjin, China.
Zhang yanping graduated from Harbin engineering university, CEO and general manager of Shenzhen KED photoelectric technology co., LTD. After graduation from university, Worked as r&d manager and sales manager of shenzhen Rilian technology co., LTD. In 2008, founded shenzhen KED optoelectronics technology co., LTD., successively serving as the company's director, r&d director, general manager and CEO, etc.
• Doctor of Philosophy, Shanghai JiaoTong University • National Information Technology Education Project Expert (Integrated Circuit), Ministry of Industry and Information Technology • Microsystem Guest Chief Expert, China Electronics Technology Group • Former Senior Electronic Engineer Cadence Research and Development Center, Shanghai • Reviewer, IEEE TMTT，IEEE TAP, DAC
Farhang Yazdani is the President and CEO of BroadPak Corporation. BroadPak is internationally recognized as the “key provider of innovative total solution for 2.5D/3D products”. Through his 20 years with the industry, he has served in various technical, management, and advisory positions with leading semiconductor companies worldwide. He is the author of the book “Foundations of Heterogeneous Integration: An Industry-Based, 2.5D/3D Pathfinding and Co-Design Approach”. He is the recipient of 2013 NIPSIA award in recognition of his contribution to the advancement and innovations in packaging technologies. He has numerous publications and IPs in the area of 2.5D/3D Packaging and Assembly, serves on various technical committees and is a frequent reviewer for IEEE Journal of Advanced Packaging. He received his undergraduate and graduate degrees in Chemical Engineering and Mechanical Engineering from the University of Washington, Seattle.
Pearl He has 20 years of industry experience in automatic semiconductor testing.She joined NI in 2013, responsible for planning strategy of semiconductor business and leading the business development of semiconductor team.Under her leadership, NI brand's popularity in the semiconductor testing industry in China and Asia Pacific increased rapidly.Over the past 20 years, she has worked as an application engineer and application development manager at the world-renowned semiconductor ATE company, and has also been responsible for engineering and services in China for U.S. start-ups.
Jensen is currently Director of the Corporate R&D for new assembly package & new technology development strategy decision. He has been exploring the strategy for various new assembly technologies. Jensen has also published many papers and patents, majorly for flip chip technologies.
Jun Yang is the package technical expert of vivo. He has over 15 years package development experience including SiP package design，material selection and process assessment. He is in charge of SiP development after join vivo in 2017.
Minghua Chen received Ph.D. from Southeast University in 1998. Then he joined Information Optoelectronics Research Institute at Tsinghua University, where he is a professor and vice-director of the institute. From 2009 to 2010, he was a visiting professor in RLE at MIT. His research interests are in silicon photonic microsystems and integrated microwave photonics.
He joined Heraeus since 2014, supporting DCB business launched in China market. At Heraeus he served in serveral positions, including MCS National sales manager in China and Technical Solution Manager for MCS in APAC. Since October 2017, Tim is segement marketing manager for Power Electronics in APAC, focus on materials solutions for customers.
Mr. Ben Gu is General Manger of the newly formed Multi-Physics System Analysis (MSA) Business Unit at Cadence Design Systems. In this position, he oversees R&D, Product Engineering and Product Marketing for all system level analysis products of the company, including the recently launched Clarity 3D Solver as well as the industry-leading Sigrity, Voltus and ESD tools. Additionally, Ben is also responsible for MSA’s business development, growth strategy and M&A, etc. Prior to joining Cadence in 2012, Ben had been with Freescale (Motorola) and Magma, where he was instrumental in developing transistor level circuit simulation tools. For the past 7 years at Cadence, Ben has held various R&D management positions and successfully launched innovative products such as Voltus, Voltus-Fi and Clarity – all with Cadence’s signature massively parallel execution algorithm that brings up to 10X speedup and virtually unlimited capacity to our customers. Ben holds a BSEE degree from Shanghai Jiaotong University in China and a MSEE from Penn State University in US. He has published numerous research papers in EDA fields, receiving multiple awards that include Cadence Corporate Innovation Award in 2014 and the prestigious IEEE Donald Peterson Best Paper Award in 2016. Ben currently holds 5 U.S patents.
Osamu Suzuki is currently a group manager of R&D unit at Namics. His current interests include research and design of material for electronics packaging. He received the 2018 Fellow of the Society Award from IMAPS.
Dr.Shuying Ma, Manager of TSV engineering Department. He focus on the study of advanced wafer level packaging technology and automotive products packaging. Up to now, he has appiled more than 20 patents which have been authorized and disclosed. He has published more than 10 papers. He is in charge of one of the National Science and Technology Major Project. In 2018, he was selected into innovative and entrepreneurial talent program in Jiangsu province.
Holding Bachelor Degree in Industrial Engineering and Master Degree in Materials Engineering at University of Trento, Italy, with final subject related to nanotechnologies. At AT&S since 2014, starting in Leoben, Austria, and later resident in China, Shanghai, within the Program for Technology transfer in Advanced Packaging. Currently, R&D Project leader at AT&S Chongqing and in charge of path finding acctivities coordination and lead for new projects in packaging applications.
Hirohisa Narahashi is a principal researcher in functional material group in Ajinomoto CO., INC.He joined in Ajinomoto CO., INC. in 2004 and is responsible for development of insulating material for semiconductor package now.He has over 10 years of experience of material development and customer technical support.He has a Master degree of Engineering at Waseda University.
Dr. Tian DeWen was graduated from Harbin Institute of Technology in 2009. After graduation, he joined ASM Technology HongKong Ltd. for the development of advanced packaging processes and related equipments. In 2017, he joined Goertek and established the advanced packaging technology public service platform, and therefore won the title of Qing Dao outstanding innovation talent in 2019. He had been invited to speak at different international conferences, and had published more than 20 papers, which were indexed by SCI/EI。
Lewis(In-Soo) Kang is Marketing Director of nepes Corporation, he earned a master’s degree in Advanced Material from KAIST (Korea Advanced Institute of Science & Technology) in 1996. Then, He joined SK-Hynix in 1997 as a packaging material and process engineer for development of ball grid array and wafer level packaging technology. In 2001, he joined nepes and up to now attended various projects related to flip chip bumping, wafer level packaging, fan-out packaging, image & MEMS sensor packaging, wafer level system packaging, IPD and TSV interposer including CTO position of nepes Singapore.
Mr. Polin Chi joined Mentor in 2018 as Asia Pacific product manager of the advanced packaging product. He has been working in the sales of EDA products for nearly 20 years, including more than 10 years of experience in sales of packaging and board design automation software. He has been the general manager of Sigrity Taiwan for 7 years since 2005 and witnessed the development of packaging from Leadframes to wirebond, flipchip, and 2.5D/3D packaging. With in-depth research on the evolution of packaging technology and comprehensive work experience in leading companies, he is a professional with extensive knowledge in packaging market and technology. Mr. Polin Chi graduated from Electrical Engineering school at Taiwan University with a bachelor's degree in engineering. He also gained his master's degree in business administration from Taiwan University.
Steven joined spreadtrum communications (Shanghai) co., LTD. (now-unisoc) in July 2012 and he is the leader of the Codesign Team of chip packaging. Steven has 17 years of working experience in chip design and semiconductor industry, and is the earliest technical expert engaged in cross-platform collaborative design and simulation analysis in China. Before joining spreadtrum, Steven worked for VeriSilicon, the largest chip Design Service company in China, for more than 8 years. During 2008-2009, he participated in the design project of high-speed and high-power ASIC series, and cooperated with the chip design team and technical experts of IBM to complete the one time successful design of Tapeout of multiple complex high-speed and high-power network processor chips. Steven received his master's degree from school of communication, Shanghai University in 2002.
Namkyu Kim has been working as a sales manager for Zeston Korea for 4 years after spending the last 20 years at Amkor, Cookson and Panasoinc Korea as a process, technical sevice engineer and sales manager representing IC semiconductor packaging and electronic material manufacturer.
Xie Jianyou, with sixteen years of experience in packaging industry, is an expert in system-level packaging (SiP). He is currently working for Tongfu Microelectronics and is the chief scientist of Tongfu Research Institute. 68 patents have been applied and 29 patents have been authorized. Before joining Tongfu Company, he worked in a well-known sealing and testing company in China, and established Laminated packaging product line and SiP product line, as well as electric/thermal/mechanical/fluid multi-physical domain design and simulation system. He was the first person in charge of sealing and testing product line from design/development to mass production of 16nm/14nm. Inventor of mass-produced capacitive under glass fingerprint recognition package (TSV + SiP).